The subject of this invention is a method and an apparatus for indirect conversion of a voltage value to a digital word that can be applied in monitoring and control systems.
A method for indirect conversion of a voltage value to a digital word is known from the article G. Smarandoiu, K. Fukahori, P. R. Gray, D. A. Hodges “An All-MOS Analog-to-Digital Converter Using a Constant Slope Approach”, IEEE Journal of Solid-State Circuits, Volume: 11, Issue: 3, 1976, str. 408-:-410. An input voltage is sampled first. Charge accumulated in a sampling capacitor is further removed bz the use of a current source of a fixed intensity. Thus, time needed to discharged the sampling capacitor is directly proportional to a value of the input voltage. A conversion of a capacitor discharge time to a digital number is realized by counting of reference clock periods.
A method for indirect conversion of a voltage value to a digital word is also known from the patent document U.S. Pat. No. 8,928,516 consists in mapping of a voltage value to a proportional charge portion. The charge portion is accumulated in a sampling capacitor by a parallel connection of the sampling capacitor to a source of an input voltage during active state of a trigger input. Next, the portion of electric charge is converted to the digital word by its redistribution from the sampling capacitor to a set of capacitors of binary-weighted capacitances. Each capacitor corresponds to a bit in output digital word. In each step of the second stage of conversion, the redistribution is realized by charge transfer between two capacitors. A capacitor that is actually a source of charge is called a current source capacitor. A capacitor that actually collects charge is called a current destination capacitor. The current destination capacitor has always lower capacitance than the current source capacitor. Moving the charge results in growing the voltage on the current destination capacitor and at the same time in falling the voltage on the current source capacitor. If the voltage on the current destination capacitor reaches the reference voltage before the voltage on the current source capacitor falls to zero, then, in the next conversion step, the charge transfer is continued to a new destination capacitor whose capacitance is twice lower than a capacitance of the current destination capacitor. If the voltage on the current source capacitor falls to zero before the current destination capacitor reaches the reference voltage, then, in the next conversion step, the current destination capacitor becomes a new source capacitor, and a new destination capacitor has a capacitance twice lower than a capacitance of the current destination capacitor. If a voltage on a particular capacitor equals the reference voltage, then a value one is assigned to a bit in the output digital word corresponding to this capacitor, and a value zero is assigned to other bits.
An apparatus for indirect conversion of a voltage value to a digital word is known from the article H. Amemiya, T. Yoneyama “Integrating Analog-to-Digital Converter with Digital Self-Calibration”, IEEE Transactions on Instrumentation and Measurement, Volume IM-25, Issue 2, 1976, str. 132-138. An input voltage is provided to a first stationary contact of a change-over switch, whose second stationary contact is connected to a source of a reference voltage. A moving contact of this change-over switch is connected to an input of an integrator, whose output is connected to a first input of a comparator. A second input of a comparator is connected to a source of a threshold voltage, and an output of the comparator is connected to a first input of control logic comprising a digital counter. A second input of control logic is connected to an output of a reference generator. Besides, control logic is equipped with a digital output and control output connected to a control input of the change-over switch.
An apparatus for indirect conversion of a voltage value to a digital word known from the patent document U.S. Pat. No. 8,928,516 comprises a sampling capacitor and a set of capacitors of binary-weighted capacitances. A top plate of the sampling capacitor is connected to a source of input voltage through an on-off input switch, whose control input is connected to a control output of a control module. A bottom plate of each capacitor is connected through a change-over switch to the ground of the circuit, or to a source of auxiliary voltage, while a value of auxiliary voltage is higher enough than a value of a reference voltage. A non-inverting input of a first comparator is also connected to the source of auxiliary voltage. The first comparator is used to detect that a source capacitor is completely discharged. The inverting input of the first comparator is connected to a source rail. A non-inverting input of a second comparator is connected to the source of reference voltage, and an inverting input of the second comparator is connected to a destination rail. The second comparator is used to detect that a voltage on a destination capacitor reaches the reference voltage. The destination rail is connected through an on-off switch to the ground of the circuit and to an output of a current source whose input is connected through a change-over switch to the source rail or to a source of supply voltage. A top plate of each capacitor is connected through a source on-off switch to the source rail, and a destination on-off switch to the destination rail. Control inputs of the change-over switches and on-off switches are connected to relevant control outputs of a control module. A destination on-off switch corresponding to a given capacitor is controlled by the same control output of the control module, while a source on-off switch is controlled by another control output of the control module. Outputs of both comparators and a time input are also connected to the control module. Besides, the control module comprises a digital output and a complete conversion output.